The present invention relates to a drive circuit for a liquid crystal display panel.
Conventionally, the drive circuit of a liquid crystal display panel provides a constant sequence in generating the backplate signal at a certain predetermined duty factor. As a result, such a sequence cannot optionally be variable by any program operation.
Consequently, terminals of both the backplate and segment electrodes of the liquid crystal display panel have been fixed to the terminals of the LSI which makes up the drive circuits of the liquid crystal display panel.
Furthermore, since the duty factor remains constant, the sequence of generating the backplate signal cannot be controlled by means of the program operation. For example, the desired program operations cannot be performed when either the 1/16th or 1/18th of the duty factor when a particular duty factor different from that utilized by the drive circuit is preferred for use with the display. It is generally known that, due to specific characteristics of the liquid crystal display panel, the higher the duty factor (1/16th instead of 1/18th), the better the display quality.
For example, existing liquid crystal display panels cannot selectively develop a display with the 1/16th of the duty factor for better display quality during the normal mode nor with the 1/18th of the duty factor for a greater number of the picture elements, although it may slightly lower the display quality.
The primary object of the present invention is to provide a drive circuit for the dot matrix liquid crystal display panel, which either generates the backplate signal under any optional sequence or optionally provides any desired duty factor so that it can effectively be applied to a variety of uses.
The primary feature of the drive circuit embodied in the present invention is that a random access memory RAM is provided in the drive circuit chip where both the backplate and segment signals are generated in response to a specific data that is present in said RAM so that the drive circuit can optionally provide any desired sequence in generating the backplate signal in accordance with the relevant data stored in said RAM.
The second feature of the drive circuit embodied in the present invention is that the drive circuit chip comprises a counter that determines a specific duty factor for the liquid crystal enable signal, allowing the drive circuit to optionally provide any desired duty factor by merely varying the operational condition of the counter.
The third feature of the drive circuit embodied in the present invention is that the contents stored in the RAM that is in the drive circuit chip can be variable by the operation of an independent CPU (central processing unit), while using the data transmission and reception wires connected between the CPU and RAM, even the operational condition of the counter itself can also be variable.